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  type ordering code package tle 7272 d q67006- a9734 p-to252-5 tle 7272 g q67006- a9735 p-to263-5 5-v low drop voltage regulator tle 7272 p-to252-5-1 p-to263-5-1 data sheet 1 rev. 1.0a, 2005-02-08 features ? output voltage 5 v 2%  ultra low current c onsumption: typ. 25 a  300 ma current capability  inhibit input  reset  very low-drop voltage  short-circuit-proof  suitable for use in automotive electronics functional description the tle 7272 is a monolithic integrated low-drop voltage regulator for load currents up to 300 ma. an input voltage up to 42 v is regulated to v q,nom = 5.0 v with a precision of 2%. due to its integrated reset circuitry featuring power on timing and output voltage monitoring the ic is well suited as -controller supply. the sophisticated design allows to achieve stable operation even with ceramic output capacitors down to 470 nf. the device is designed for the harsh environment of automotive applications. therefore it is protected against overload, short circuit and overtemperature condit ions. of course the tle 7272 can be used also in all other applications, where a stabilized 5 v voltage is required. due to its ultra low stand-b y current consumption of typ. 20 a the tle 7272 is dedicated for use in applications permanently connected to v bat . in addition the ic can be switched off via the inhibit input redu cing the current consumption to typ. 5 a. an integrated output sink current circuitry keep s the voltage at the output pin q below 5.5 v even when reverse currents are applied. thus connected devices are protected from overvoltage damage. for applications requiring extremely low noise levels the infineon voltage regulator family tle 42xy and tle 44xy is more suited than the tle 7272. a mv-range output noise on the tle 7272 caused by the charge pump operation is unavoidable due to the ultra low quiescent current concept.
data sheet 2 rev. 1.0a, 2005-02-08 tle 7272 reset the reset pin informs e.g. the microcontrolle r in case the output voltage has fallen below the lower threshold v rt of typ. 4.65 v. the hysteresis is typically 100mv. connecting the regulator to a battery voltage at first the reset signal remains low. when the output voltage has reached the reset threshold v rt the reset output ro remains still low for the reset delay time t rd (typ. 16 ms). afterwards the re set output turns high. tle 7272 overtemperature shutdown 1 bandgap reference charge pump inhibit reset generator q r o 5 2 gnd 3 aeb03523.vsd 4 1 figure 1 block diagram
aep02825_7272 ro inh q i gnd gnd ro  iep02528 inh q tle 7272 data sheet 3 rev. 1.0a, 2005-02-08 figure 2 pin configuration p-to25 2-5 (d-pak), p-to263-5 (d 2 -pak) (top view) table 1 pin definitions and functions pin no. symbol function 1 i input; block to ground directly at the ic with a ceramic capacitor. 2 ro reset output; open collector output with integrated pull-up resistor of typically 30k  . optional external pull-up resistor of  10 k  to pin q. 3 gnd ground; pin 3 internally connected to heatsink. 4 inh inhibit input; low level disables the ic. integrated pull-down resistor. 5 q output; block to ground with a ceramic capacitor, c  470 nf.
table 2 absolute maximum ratings parameter symbol limit values unit test condition min. max. input i voltage v i -0.3 45 v ? current i i -1 ? ma ? output q voltage v q -0.3 5.5 v ? voltage v q -0.3 6.2 v t < 10 s 1) exposure to these absolute maxi mum ratings for extended periods ( t > 10 s) may affect device reliability. 1) current i q -1 ? ma ? reset output ro voltage v ro -0.3 5.5 v ? voltage v ro -0.3 6.2 v t < 10 s 1) current i ro -1 1 ma ? inhibit input inh voltage v inh -0.3 45 v observe current limit i inh 2) external resistor required to keep the current below the absolute maximum rating when voltages  5.5 v are applied. max 2) current i inh -1 1 ma ? temperature junction temperature t j -40 150 c ? storage temperature t stg -50 150 c ? data sheet 4 rev. 1.0a, 2005-02-08 tle 7272 note: stresses above those listed here ma y cause permanent damage to the device. exposure to absolute maximum rating condi tions for extended periods may affect device reliability.
table 3 operating range parameter symbol limit values unit remarks min. max. input voltage v i 5.5 42 v ? junction temperature t j -40 150 c ? tle 7272 data sheet 5 rev. 1.0a, 2005-02-08 note: in the operating range, the functions given in the circuit description are fulfilled. table 4 parameter symbol limit values unit remarks min. max. junction case r thj-c ? 8 k/w ? junction ambient r thj-a ? 80 k/w to252 1) worst case, regarding peak temperature; zero airflow; mounted on a pcb fr4, 80 80 1.5 mm 3 , heat sink area 300 mm 2 1) junction ambient r thj-a ? 55 k/w to263 2) worst case, regarding peak temperature; zero airflow; mounted on a pcb fr4, 80 80 1.5 mm 3 , heat sink area 300 mm 2 2) thermal resistance
table 5 electrical characteristics parameter symbol limit values unit measuring condition min. typ. max. output q output voltage v q 4.9 5.0 5.1 v 0.1 ma< i q <300 ma; 6 v < v i < 16 v output voltage v q 4.9 5.0 5.1 v 0.1 ma< i q <100 ma; 6 v < v i < 40 v output current limitation i q 320 ? ? ma 1) measured when the output voltage v q has dropped 100 mv from the nominal value obtained at v i = 13.5 v. 1) output current limitation i q ? ? 800 ma v q = 0v current consumption; i q = i i ? i q i q ? 20 30 a i q = 0.1 ma; t j = 25 c current consumption; i q = i i ? i q i q ? ? 40 a i q = 0.1 ma; t j  80 c quiescent current inhibited i q ? 5 9 a v inh = 0 v; t j < 80c drop voltage v dr ? 250 500 mv i q = 200 ma v dr = v i ? v q 1) load regulation  v q, lo ? 40 15 40 mv i q = 5 ma to 250 ma line regulation  v q, li ? 20 5 20 mv v l = 10 v to 32 v; i q = 5 ma power supply ripple rejection psrr ? 60 ? db f r = 100 hz; v r = 0.5 vpp temperature output voltage drift dv q dt ---------- - ? 0.5 ? mv/k ? output capacitor c q 470 ? ? nf esr < 3  inhibit inh turn-on voltage v inh on 3.1 ? ? v v q  4.9 v turn-off voltage v inh off ? ? 0.8 v v q  0.3 v h-input current i inh on ? 3 4 a v inh = 5 v l- input current i inh off ? 0.5 1 a v inh = 0 v, t j < 80c data sheet 6 rev. 1.0a, 2005-02-08 tle 7272 application information
reset output ro reset switching threshold v rt 4.50 4.65 4.80 v v q decreasing v i = 6v reset read room v rh ? 160 ? mv reset output low voltage v rol ? 0.2 0.4 v r ro = 10 k  ; v q > 1 v internal reset pull up resistor r r,int 15 30 45 k  external reset pull up resistor r r,ext 10 1) an external reset pull up resistor is not required.  1) k  see fig. 3 reset delay time t rd 10 16 22 ms reset reaction time t rr ? ? 12 s tle 7272 data sheet 7 rev. 1.0a, 2005-02-08
tle 7272 overtemperature shutdown 1 bandgap reference char ge pump inhibit 3 gnd aea03522.vsd inh 4 1 i 100 nf v bat e. g. ignition reset generator 5 2 q ro 470 nf 22 k  4.7 f v cc rese t data sheet 8 rev. 1.0a, 2005-02-08 tle 7272 figure 3 application diagram input, output an input capacitor is necessary for dampi ng line influences. a resistor of approx. 1  in series with c i , can damp the lc of the input in ductivity and the input capacitor. the tle 7272 requires a ceramic output capacitor of at least 470 nf to assure stability of the regulation loop. in order to damp influences resulting from load current surges it is recommended to add an additional electrolytic capacitor of 4.7 f to 47 f at the output as shown in figure 3 .
data sheet 9 rev. 1.0a, 2005-02-08 tle 7272 typical performan ce characteristics current consumption i q versus junction temperature t j 1_iq-tj.vsd 10 1 0.01 100 i q [ a ] -4 0 t j [c ] -2 0 2 0 4 0 8 0 1 0 0 060 140 120 v i = 1 3 .5 v i q = 100 a current consumption i q versus output current i q 04060 2_iq-iq.vsd 15 10 5 20 20 100 t j = -40 c 30 t j = 25 c i q [m a ] i q [ a ] v i = 13.5 v current consumption i q versus input voltage v i 0 v i [v ] 20 30 i q [ a ] 3_iq -vi.vsd 30 20 10 40 10 40 i q = 0.2m a i q = 10m a i q = 50m a tj = 25c output voltage v q versus junction temperature t j -4 0 t j [c ] -20 20 40 80 100 v q [v ] 5a_vq -tj.vsd 5.00 4.95 4.90 5.05 060 140 120 v i = 1 3 .5 v i q = 1 0 0 a ...1 0 0 m a
data sheet 10 rev. 1.0a, 2005-02-08 tle 7272 dropout voltage v dr versus output current i q 0 i q [m a ] 100 200 v dr [m v ] 6_vdr -iq .vsd 300 200 100 400 300 600 t j = 150 c t j = 25 c t j = -40 c dropout voltage v dr versus junction temperature t j -4 0 t j [c ] -20 20 40 80 100 v dr [m v ] 7_vdr-tj.vsd 300 200 100 400 060 140 120 i q = 150m a 600 i q = 250 m a i q = 10 m a maximum output current i q versus junction temperature t j -4 0 t j [c ] -2 0 2 0 4 0 8 0 1 0 0 i q [m a ] 8_iq m ax-tj.vsd 560 540 520 580 060 140 120 v i = 1 3 .5 v 500 620 maximum output current i q versus input voltage v i 0 v i [v ] 20 30 i q [m a ] 9_so a.vsd 300 200 100 400 10 40 600 i q lim t j = 25 c t j = 125 c pvm ax = 1,18w for to 252 @ 300m m 2 cooling area
data sheet 11 rev. 1.0a, 2005-02-08 tle 7272 region of stability 12_esr -iq .vsd 1 0.1 0.01 esr cq [  ] 0 i q [m a ] 100 150 50 200 c q = 10nf ...10 f t j = 25 c 100 10 stable region power supply ripple rejection psrr versus frequency f 10 f [h z ] 10k psrr [d b ] 13_psr r.vsd 60 50 100 1k 100 k 80 30 40 i q = 30 m a v ripple = 1 v v in = 13.5 v c q = 10 f tantalum t j = 25 c i q = 100 m a i q = 0.1 m a output voltage v q start-up behaviour v q [v ] 14_vi- tim e_startup.vsd 5.00 4.90 4.80 5.05 i q = 5m a 1 t [m s ] 34 25 inh = on load regulation dv q versus output current change di q 0 i q [m a ] 100 150  v q [m v ] 18a_dvq -diq _vi6v.vsd -1 5 -2 0 -2 5 -1 0 50 250 0 t j = 25 c -3 0 v i = 6v t j = -40 c t j = 150 c
data sheet 12 rev. 1.0a, 2005-02-08 tle 7272 load regulation dv q versus output current change di q 0 i q [m a ] 100 150  v q [m v ] 18b_dvq -diq _vi135v.vsd -1 5 -2 0 -2 5 -1 0 50 250 0 t j = 25 c -3 0 v i = 13.5v t j = -40 c t j = 150 c load regulation dv q versus output current change di q 0 i q [m a ] 100 150  v q [m v ] 18c_dvq -diq _vi28v.vsd -1 5 -2 0 -2 5 -1 0 50 250 0 t j = 25 c -3 0 v i = 28 t j = -40 c t j = 150 c line regulation dv q versus input voltage changedv i 0 v i [v ] 5 1520 3035  v q [m v ] 19_dvq -dvi__150c .vsd -3 -4 -5 -2 10 25 45 40 0 t j =150 c -6 iq = 10m a iq = 200m a iq = 100m a iq = 1m a line regulation dv q versus input voltage changedv i 0 v i [v ] 5 1520 3035  v q [m v ] 19_dvq -dvi_25c .vsd -3 -4 -5 -2 10 25 45 40 0 t j = 25 c -6 iq = 10m a iq = 200m a iq = 100m a iq = 1m a
data sheet 13 rev. 1.0a, 2005-02-08 tle 7272 line regulation dv q versus input voltage changedv i 0 v i [v ] 5 1520 3035  v q [m v ] 19_dvq -dvi_-40c .vsd -3 -4 -5 -2 10 25 45 40 0 t j =40 c -6 iq = 10m a iq = 200m a iq = 100m a iq = 1m a load transient resp onse peak voltage dv q 20_load trancient vs tim e 25.vsd iq 1:100m a t=40s/div vq=100mv/div vq tj=25c vi=13.5v load transient response peak voltage dv q 20_load trancient vs tim e 125.vsd iq 1:100m a t=40s/div vq=100mv/div vq tj=125c vi=13.5v line transient resp onse peak voltage dv q 21_line trancient vs tim e 25.vsd dv i 2v t= 400s/d iv vq=50mv/div vq tj=25c vi=13.5v
data sheet 14 rev. 1.0a, 2005-02-08 tle 7272 line transient resp onse peak voltage dv q 21_line trancient vs tim e 125.vsd dv i 2v t= 400s/d iv vq=50mv/div vq tj=125c vi=13.5v inhibit input current i inh versus inhibit input voltage v inh i in h [ a ] 24_iin h vs vin h .vsd 30 20 10 40 tj = 25c 10 v in h [v ] 30 40 20 50 tj = -40c tj = 150c inhibit input current i inh versus input voltage v i , inh=off i in h [ a ] 25_iin h vs vin in h _off.vsd 0.6 0.4 0.2 0.8 tj = 25c 10 v in [v ] 30 40 20 1.0 tj = -40c tj = 150c in h = o f f reset threshold v rt versus junction temperature t j -4 0 t j [c ] -20 20 40 80 100 v q [v ] 26_vr t vs tem p.vsd 4.80 4.70 4.60 4.90 060 140 120 v i = 1 3 .5 v reset release threshold reset trigger threshold
data sheet 15 rev. 1.0a, 2005-02-08 tle 7272 reset delay t rd time versus junction temperature t j -4 0 t j [c ] -2 0 2 0 4 0 8 0 1 0 0 t rd [m s ] 27_resetdelay vs tem p.vsd 16 14 12 18 060 140 120 v i = 1 3 .5 v 22 reset headroom versus junction temperature t j -4 0 t j [c ] -20 20 40 80 100 v q [v ] 28_vr t h ead r o o m vs tem p.vsd 120 80 40 160 0 60 140 120 v i = 1 3 .5 v 240 thermal resistance junction-ambient r thja versus power dissipation p v p v [w ] 69 r th-ja [k /w ] 32_r th vs pv to 252.vsd 60 55 50 65 312 a = 300m m 2 c ooling area single sided pc b 75 to 252-3 to 252-5
data sheet 16 rev. 1.0a, 2005-02-08 tle 7272 package outlines gpt09161 5.4 0.1 -0.10 6.5 +0.15 a 0.5 9.9 6.22 -0.2 1 0.1 0.15 0.8 0.15 max 0.1 per side 5x0.6 1.14 4.56 +0.08 -0.04 0.9 2.3 -0.10 +0.05 b 0.51 min 0.1 1 +0.08 -0.04 0.5 0...0.15 b a 0.25 m 0.1 all metal surfaces tin plated, except area of cut. (4.17) figure 4 p-to252-5-1 (plastic transistor single outline) you can find all of our packages , sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm
1) includes mold flashes on each side. 4.56 0.25 m a 6.5 5.7 max. 0.1 per side 0.15 max. -0.2 6.22 0.5 9.98 (4.24) 1 a 1.14 5 x 0.6 0.15 0.8 0.1 +0.15 -0.05 0.1 b -0.04 +0.08 0...0.15 0.51 min. 0.5 b 2.3 -0.10 0.5 +0.05 -0.04 +0.08 (5) -0.01 0.9 +0.20 b 1) all metal surfaces tin plated, except area of cut. gpt09527 tle 7272 data sheet 17 rev. 1.0a, 2005-02-08 figure 5 p-to252-5-11 (plastic transistor single outline) you can find all of our packages , sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm
a 8 max. b a 0.25 m 0.1 typical 9.8 0.15 0.2 10 8.5 1) 8 1) (15) 0.2 9.25 0.3 1 0...0.15 5x0.8 0.1 0.1 1.27 4.4 b 0.5 0.1 0.3 2.7 4.7 0.5 0.05 1) 0.1 all metal surfaces tin plated, except area of cut. 2.4 4x1.7 gpt09113 data sheet 18 rev. 1.0a, 2005-02-08 tle 7272 figure 6 p-to263-5-1 (plastic transistor single outline) you can find all of our packages , sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm
edition 2005-02-08 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2004. all rights reserved. attention please! the information herein is given to describe certain co mponents and shall not be considered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology, delivery terms a nd conditions and prices pl ease contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements components may contain dang erous substances. for information on the types in question please contact your near est infineon technologies office. infineon technologies components may only be used in lif e-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
tle 7272


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